Aim
From tinkertoy to parallel computing paradigm
The methodology of reconfigurable circuits and systems is evolving from
tinkertoy approach to an: Innovative Parallel Computing Paradigm which
combines computing in time with com puting in space. The aim of this workshop
is to bring together workers from throughout the world for a wide ranging
discussion of all forms of field programmable logic, particularly field
programmable gate arrays and complex programmable logic devices, and their
applications. It is intended to discuss the increasing range of device
types, industrial applications, advanced design tool development, research
applications, novel system architectures and educational experiences. The
workshop will include regular presentations, posters and discussion sessions,
and it is expected that most of the delegates will wish to make some contribution
to one or more of these. The workshop is the eighth in a series of workshops
which were held in Oxford (1991, 1993 and 1995), Vienna (1992), Prague
(1994), Darmstadt (1996) and London (1997).
Scope
Field Programmable Logic has been available for a number of years, but
the increasing power and variety of devices now available is extending
its role from that of simply being a convenient way of implementing the
system `glue logic' to an increasing ability to implement mainstream system
functions. The speed with which devices can be programmed makes them ideal
for prototyping and for education; the reprogrammable devices are opening
up sophisticated new applications and new hardware/software trade-offs.
Computer-based tools are being developed for automatic compilation of advanced
designs, and routes to custom circuits are now available.
The scope of the workshop includes, but is not limited to, the following
aspects:
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Novel device, machine and system architectures
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New software and hardware development tools
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Run-time reconfigurable and partially reconfigurable designs
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High-level design and compilation research
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Industrial applications and experiences
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Trade-offs between devices, architectures and technologies
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Benchmarking and profiling
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Applications from a wide variety of areas
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Reconfigurable Custom Computing Machines
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Hardware/software co-design using field programmable devices
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Evolvable and adaptable systems
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ASIC emulators, hardware modellers and compiled accelerators
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Fault modelling, testability methods and reliability issues
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Educational experiences and opportunities
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Reconfigurable accelerators and their applications
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Speed-up effects - survey and analysis
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Testing of reconfigurable circuits
Last update: 22.10.97 by Kalle Tammemäe,
nalleATcc.ttu.ee